Faces Keyboard3 Control Protocol (Firmware v03)

1. Hardware Interface

1.1 IRQ Timing

When new key data is generated, IRQ is pulled low. After the host finishes reading the data, IRQ returns high.

Key pressed                 Host read complete
   |                              |
---+ IRQ low (0) -----------------+ IRQ high (1)

2. Operating Modes

The module enters Normal mode by default after power-on.
The host can switch operating modes using command 0xF0.

3. Register Address Map

4. Write Operations (Host to Module)

The write format is [register address] [data], with a fixed total length of 2 bytes.

4.1 I2C Address

After a new address is written to 0xFF, the configuration takes effect immediately. The operation takes approximately 20 ms, and the setting persists after power-off.

Ensure that the address value is within the valid I2C address range allowed by the system.

5. Read Operations (Module to Host)

5.1 Read Procedure

1. The host first writes a 1-byte register address.
2. The host then initiates an I2C read.
3. The module returns data sequentially from that register address.

5.2 Readable Register Blocks

Block A: Device Type ID

Block B: UID

The UID is read and cached when the device powers on. The host can start at any address from 0xE0 through 0xEB and read up to the number of bytes remaining through 0xEB.

Block C: Operating Mode + LED Mode

Block D: Firmware Version + I2C Address

6. Normal Mode

In Normal mode, the firmware maps keys, and the host reads the ASCII data corresponding to each key.

6.1 Modifier Priority

If multiple modifier keys are active at the same time, the output is determined by the following priority, from highest to lowest:

ALT > SYM > FN > aA > default

The corresponding mappings are:

6.2 Special Handling for the Enter Key

The Enter key does not use KeyMap. Instead, it always outputs:

• First read: 0x0D (\r)
• Second read: 0x0A (\n)

In other words, pressing Enter generates one IRQ, and the host must perform two consecutive reads. The interrupt is cleared only after both reads are complete.

7. Direct Mode

In Direct mode, the module directly outputs raw key matrix data.

7.1 Trigger Condition

Whenever the state of any key changes, IRQ is pulled low.
The host must read a fixed 10-byte packet each time.

7.2 Packet Format

7.3 Format of Each 2-Byte Group

High byte (Byte N):
  Bit 7   : Change flag (1 = current data differs from previous data)
  Bit 6-4 : Row index (0-3)
  Bit 1-0 : GPIOA IDR bits 9-8 (PA9, PA8)

Low byte (Byte N+1):
  Bit 7-0 : GPIOA IDR bits 7-0 (PA7-PA0)

7.4 Combining the 10-Bit Raw Value

raw = ((high_byte & 0x03) << 8) | low_byte;

7.5 Modifier Key Row

8. LED Effect Control (Command 0xF1)

8.1 Preset LED Effect Modes (0x00-0x08)

8.2 Manual Control Mode (Bit 7 = 1)

When Bit 7 of the parameter is 1, manual bit control mode is enabled.

Bit Definitions

Common Examples

9. Modifier Key Logic (Normal Mode)

9.1 State Transitions for aA / FN / SYM

These three keys use the same state machine:

State 0 (Off)
  | Single-click
  v
State 1 (One-shot) -- Press a regular key --> Automatically returns to State 0
  | Single-click again
  v
State 2 (Locked)
  | Single-click again
  v
State 0

In simple terms:

• Single-click once: applies only to the next regular key press
• Quick double-click: enters the locked state
• Single-click while locked: turns it off

9.2 Modifier Mutual Exclusion

When any modifier key becomes active, all other modifier keys are cleared.
Only one modifier key can be active at a time.

10. Key Mapping Table (Normal Mode)

11. Notes

• Normal mode is suitable when the host reads characters directly.
• Direct mode is suitable when the host processes the matrix scan results itself.
• To support the Enter key, the host must specifically handle its two-read behavior.
• For reliable interrupt handling, communicate strictly by reading after IRQ is pulled low and waiting for it to return high after the read is complete.